SK Hynix plans to invest roughly ₩400 billion in test equipment for its next-generation HBM4 memory, accelerating the expansion of its Cheongju fabrication site, according to a report from finance.biggo.com.

The figure anchors what is effectively a capacity-and-quality decision: HBM4, the fourth generation of high-bandwidth memory, raises the interface speed and stack complexity beyond HBM3E, and back-end test — not lithography — becomes a larger share of the unit cost and cycle time. A ₩400 billion ($290 million–class) commitment concentrated in test hardware signals that SK Hynix expects HBM4 verification load to scale steeply as it moves from qualification toward volume supply.

Why test equipment leads an HBM4 ramp

HBM stacks place eight or more DRAM dies in a vertical package with through-silicon vias. Each stacked device must be screened for known-good-die quality, thermal behavior, and high-speed interface margin before it ships to AI accelerator customers. When per-stack data rates rise — as they do from HBM3E to HBM4 — burn-in and final test times lengthen unless the tester fleet grows. That arithmetic drives capital spending toward ATE platforms, handlers, and burn-in chambers years before peak output.

Cheongju, south of Seoul, already hosts SK Hynix's advanced packaging capacity for HBM. Accelerating equipment installation there compresses the gap between customer qualification and mass delivery, a schedule variable that matters more than unit price in current AI-memory procurement.

What remains unconfirmed

The report gives the headline investment figure and the direction of the Cheongju buildout but does not specify:

• Which test vendors will supply the equipment
• A delivery or installation timeline
• Whether the ₩400 billion covers ATE only, or includes handlers, burn-in, and probe hardware
• How the spend splits between HBM4 qualification lines and volume production lines

The competitive backdrop

SK Hynix leads the HBM market and supplies major AI accelerator makers. Rivals Samsung and Micron are racing to qualify their own HBM4 parts with the same hyperscale customers, so tester capacity directly gates who can commit to delivery volumes first. Capacity commitments in test are therefore read as forward indicators of HBM4 market share, not just internal engineering plans.

For instrument vendors — Teradyne, Advantest, and Korean suppliers competing for the order — an allocation of this size at a single site ranks among the largest memory-test capital events of the cycle.

The open question

SK Hynix has not confirmed the figure or named suppliers. The question the report raises for buyers and competitors alike: does a ₩400 billion test budget this early in the HBM4 cycle indicate qualification is further along than public roadmaps suggest — and which tester vendors will capture the order?