D.I. has won a semiconductor test equipment order from Samsung Electronics, the Korean handler specialist confirmed via a regulatory filing reported by The Elec on January 20, 2025. The contract covers handler and test-cell equipment destined for Samsung's memory back-end lines, though the dollar value, model designation, and delivery schedule remain undisclosed in the public notice.

What does D.I. bring to the memory test floor?

D.I. supplies gravity and pick-and-place handlers rated for stacked-DDR, HBM, and NAND packages, with thermal soak capability across the −40 to +125 °C range that JEDEC stress profiles require. The company's handlers typically target 4,000–8,000 units-per-hour throughput on trimmed tray-based devices, a figure that matters when Samsung ramps HBM3E volume for AI accelerator supply.

Why does the order land now?

The timing tracks the channel's 1.2 million wafer-equivalent HBM demand projection for 2025, a number driven by Nvidia, AMD, and hyperscaler pull-through. Samsung needs parallel back-end capacity to support its 1b-nm DRAM and eighth-generation V-NAND ramps. Test-floor bottlenecks — not wafer-fab throughput — now determine how quickly those devices reach qualification.

What the filing does and doesn't say

Korean KOSPI disclosure rules require listed vendors to report contracts worth more than 5% of trailing equity capital, but they do not require line-level model numbers, pricing, or shipment milestones. Readers looking for handler class, index time, or contact-force spec should wait for the next earnings call or a Samsung SEC filing.

Where D.I. sits in the handler market

The Korean test-handler market splits three ways: D.I., Techwing, and the Korean operations of ex-Japanese vendors such as Advantest-affiliated Hanmi and Sumi. D.I. has historically competed on price rather than on the high-parallelism parallel-test cells that Techwing supplies to Hynix. The Samsung win suggests D.I. closed a performance gap on indexer repeatability — measured in µm-class placement accuracy — that previously kept it out of HBM pick-and-place cells.

What the order changes

For Samsung, the question is qualification: which SKUs move to the D.I. line, and how the handler's contact-force and temperature stability compare to the incumbent Advantest T5503HS cells that currently dominate Samsung's HBM test. For D.I., the question is margin: handler ASPs in memory run 30–40% below SoC handler pricing, so volume must offset the discount.

The order also raises a supply-chain compliance question. Korean equipment vendors shipping into Samsung's memory fabs must meet SEMI E10 and E12 safety standards and pass Samsung's internal QSA-6100 vendor qualification. Whether D.I. has cleared both gates across its full handler portfolio — or only on the specific platform Samsung ordered — will determine whether the contract expands into a multi-platform framework socket into a broader supply agreement by mid-2025.